1. Field of the Invention
The present invention relates to a method for adjusting a common-mode voltage in a signal transmission system.
2. Description of the Related Art
The performance of components constituting information processing apparatuses that include a computer has been greatly improved. Along with performance improvements in static random access memory (SRAM), dynamic random access memory (DRAM), processors, switch-use large scale integration (LSI) and such, improvements in the signal transmission speed between these components, and between elements, have become vital for improving the performance of the entirety of a system. For instance, the speed gap between a processor and memory, such as SRAM and DRAM, is becoming larger, so that the speed gap has become an obstacle to the improvement in performance of computers in recent years. Also associated with the enlargement of a chip, not only the aforementioned signal transmission but also the signal transmission speed between elements and between circuit blocks within the chip has become a large factor limiting the performance of the chip.
In the transmission of a signal of high-frequency data, an important cause of degradation of a signal waveform is fluctuations in a common-mode voltage. The common-mode voltage is generally caused by a line voltage being separated into a common-mode component and a differential mode component when a parallel transmission line is placed in parallel with a ground surface close thereto and excited. When, for example, transmitting a signal between circuits with different common-mode voltages, an output common-mode voltage of an output buffer at a circuit of a preceding stage is preferably close to a common-mode voltage of an input buffer at a circuit of a subsequent stage; otherwise, if those common voltages are significantly different from each other, the timing accuracy of a signal, expressed by skew and jitter, is degraded, making it difficult to maintain the quality of a propagation signal.
The conventional example of a method for adjusting the common-mode voltage in such a signal transmission circuit is described as follows by referring to FIGS. 14 through 17. FIG. 14 is a diagram describing a conventional example. Referring to FIG. 14, the assumption here is that a common-mode voltage is adjusted between a buffer 101a and a buffer 101b at a subsequent stage among a plurality of buffers 101 included in a signal transmission circuit 100.
In the first conventional example shown in FIG. 14, an output common-mode voltage of buffer 101a is detected, by a common-mode voltage detection circuit 102, from a transmission path within the signal transmission circuit 100, in which, for example, a differential signal is transmitted. If a semiconductor element constituting the signal transmission circuit 100 is, for example, a complementary metal oxide semiconductor (CMOS) element, an approximately intermediate value between the “H” and “L” of a voltage level is detected as a common-mode voltage. The detected voltage is input into an error amplifier 104 and compared with a reference voltage generated by a reference voltage generation circuit 103. The reference voltage is a voltage deemed to be preferable to buffer 101b at the subsequent stage; a control signal corresponding to a difference between the two voltages is fed back to buffer 101a by the error amplifier 104; and a feedback operation is performed so that the voltage detected by the common-mode voltage detection circuit 102 matches the voltage generated by the reference voltage generation circuit 103.
The first conventional example, however, is faced with the problem of being incapable of adjusting the common-mode voltage adequately because, firstly, only the output common-mode voltage of buffer 101a is monitored. Secondly, it is faced with the problem of bringing about the degradation of a signal transmission band resulting from the existence of the common-mode voltage detection circuit 102 affecting the signal transmission in the signal transmission circuit. Thirdly, the common-mode voltage detection circuit 102 often employs an RC filter constituted by, for example, a resistor and a capacitance, thus making it difficult to secure stability in a third-order system feedback loop constituted by three circuits, i.e., the aforementioned RC filter, error amplifier 104 and buffer 101a.
FIG. 15 is a diagram describing a second conventional example. The second conventional example is configured to connect an input and output of a buffer 101b of a transmission path of a differential signal by a low-impedance element 105 such as a resistor, thereby forcibly setting the operation point of buffer 101b at a voltage deemed to be most preferable to buffer 101b, that is, the operation point producing the largest gain. The second conventional example, however, is faced with the problem of an input impedance of buffer 101b decreasing, resulting in deforming an output waveform of buffer 101a.
FIGS. 16 and 17 are diagrams describing the third and fourth conventional examples of common-mode voltage adjustment methods. These conventional examples are configured to cut a direct current (DC) component by inserting capacitances 106 in transmission paths of a differential signal between buffer 101a and buffer 101b, thereby setting a common-mode voltage on buffer 101b side.
In the third conventional example shown in FIG. 16, the reference voltage generation circuit 103 gives a reference voltage so as to forcibly set the operation point of buffer 101b to the operation point producing the highest gain. Impedances 107 are inserted to prevent influence on the transmission path.
The fourth conventional example shown in FIG. 17 is configured to connect impedances 105 between the input and output of buffer 101b as in the second conventional example of FIG. 15, thereby forcibly setting the output common-mode voltage of buffer 101b at an operation point producing the highest gain. The third and fourth conventional examples are configured to insert capacitances 106 in the transmission path, causing a low-frequency component of the signal to be unable to pass through if the frequency range of the input signal is wide, which sometimes generates a problem.